Function core::arch::x86_64::_mm_setcsr1.27.0[][src]

pub unsafe fn _mm_setcsr(val: u32)
This is supported on x86-64 and target feature sse only.

Set the MXCSR register with the 32-bit unsigned integer value.

This register constrols how SIMD instructions handle floating point operations. Modifying this register only affects the current thread.

It contains several groups of flags:

Exception Flags

Exception flags can be read and set using the convenience functions _MM_GET_EXCEPTION_STATE and _MM_SET_EXCEPTION_STATE. For example, to check if an operation caused some overflow:

This example is not tested
_MM_SET_EXCEPTION_STATE(0); // clear all exception flags
                            // perform calculations
if _MM_GET_EXCEPTION_STATE() & _MM_EXCEPT_OVERFLOW != 0 {
    // handle overflow
}Run

Masking Flags

There is one masking flag for each exception flag: _MM_MASK_INVALID, _MM_MASK_DENORM, _MM_MASK_DIV_ZERO, _MM_MASK_OVERFLOW, _MM_MASK_UNDERFLOW, _MM_MASK_INEXACT.

A single masking bit can be set via

This example is not tested
_MM_SET_EXCEPTION_MASK(_MM_MASK_UNDERFLOW);Run

However, since mask bits are by default all set to 1, it is more common to want to disable certain bits. For example, to unmask the underflow exception, use:

This example is not tested
_mm_setcsr(_mm_getcsr() & !_MM_MASK_UNDERFLOW); // unmask underflow
exceptionRun

Warning: an unmasked exception will cause an exception handler to be called. The standard handler will simply terminate the process. So, in this case any underflow exception would terminate the current process with something like signal: 8, SIGFPE: erroneous arithmetic operation.

Rounding Mode

The rounding mode is describe using two bits. It can be read and set using the convenience wrappers _MM_GET_ROUNDING_MODE() and _MM_SET_ROUNDING_MODE(mode).

The rounding modes are:

Example:

This example is not tested
_MM_SET_ROUNDING_MODE(_MM_ROUND_DOWN)Run

Denormals-are-zero/Flush-to-zero Mode

If this bit is set, values that would be denormalized will be set to zero instead. This is turned off by default.

You can read and enable/disable this mode via the helper functions _MM_GET_FLUSH_ZERO_MODE() and _MM_SET_FLUSH_ZERO_MODE():

This example is not tested
_MM_SET_FLUSH_ZERO_MODE(_MM_FLUSH_ZERO_OFF); // turn off (default)
_MM_SET_FLUSH_ZERO_MODE(_MM_FLUSH_ZERO_ON); // turn onRun

Intel's documentation